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| Most Popular - Top 50 | Show Top: [ 10 - 25 - 50 | 1% - 5% - 10% ]
| On-line Specman and e tutorial
Description: An overview of the e language
Added on: 01-Sep-2004 Hits: 3097
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Category: Freeware/Training
State Machine Coverage Using Specman
Description: by Jacob Joseph
Added on: 16-Nov-2004 Hits: 3010
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Category: Reference/Papers
Quick Reference Cards from Verifica
Description: Looking for a useful Quick Reference Card for Specman, Vera, Verilog or VHDL? It's available -- free -- in the Verifica Library.
Added on: 27-Dec-2003 Hits: 2724
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Category: Freeware/Training
Design Verification with e
Description: Written for both experienced and new users, Design Verification with e gives you a broad coverage of e. It stresses the practical verification perspective of e rather than emphasizing only its language aspects.
Added on: 27-Jan-2004 Hits: 2709
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Category: Reference/Books
Writing Testbenches: Functional Verification of HDL Models
Description: How to write testbenches using VHDL, Verilog, e or OpenVera.
Added on: 30-Nov-2003 Hits: 2549
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Category: Reference/Books
Specman verification blog
Description: A blog about everything HVL - including tips, bugs, coding techniques, personal experiences and personal traumas - with special emphasis on Specman-e and SystemVerilog for verification
Added on: 18-Feb-2006 Hits: 2538
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Category: Freeware/Training
Design And Reuse, The Web's System-On-Chip Design Resource
Description: D&R provides a global collaboration network for sharing design resources in the electronics SoC industry.
Added on: 31-Mar-2004 Hits: 2510
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Category: Freeware/IP
Specman Yahoo! Group
Description: Yahoo! group for Specman users
Added on: 14-Dec-2003 Hits: 2432
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Category: Reference/Communities
Assertion-Based Design, Second Edition
Description: Text focuses on assertion-based design, showing how to specify assertions, create and adopt a methodology that supports assertion-based design, and what to do with the assertions and methodology once you have them. Discusses multiple forms of assertion specification, such as Accellera Open Verification Library (OVL).
Added on: 26-Aug-2004 Hits: 2422
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Category: Reference/Books
FPGA Central: FPGA Events, Forums, IP, Vendors, News, Webcast
Description: FPGA Central is created to provide a central place for FPGA Vendors & Users to share experiences and information about FPGA Design, Development, Verification, Validation, Process, Tools & Products.
Added on: 21-Sep-2007 Hits: 2420
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Category: Reference/Communities
The Verifica Library
Description: We've created a selective collection of papers, references and other information to help you tackle your challenging verification and design tasks. Each library item includes an opinionated review of its more noteworthy insights so you can tap into its value quickly. Check it out.
Added on: 27-Dec-2003 Hits: 2374
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Category: Reference/Reference
Principles of Functional Verification
Description: Guide to understanding and managing the verification process to reach goals of predictable flow, efficient use of resources, and a successful project outcome. Includes an assessment of the time and risk trade-offs inherent in any verification process, how to plan and manage the verification portion of projects, and more.
Added on: 13-Feb-2004 Hits: 2349
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Category: Reference/Books
Professional Verification
Description: by Paul Wilcox
A guide to advanced functional verification in the nanometer era.
Added on: 09-Jun-2004 Hits: 2265
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Category: Reference/Books
Principles of Verifiable RTL Design
Description: Explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. Reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer.
Added on: 14-Dec-2003 Hits: 2167
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Category: Reference/Books
VMK: Generic Makefile generator for VHDL models
Description: A tool that peruses VHDL source code and figures out the compilation dependencies. It then generates a Makefile to compile the model in the correct order and minimize the recompilation necessary to maintain the VHDL model.
Completely tool-indenpendent. Can be used on ANY VHDL simulator.
Open source, licensed under Apache V2.0
Added on: 08-May-2007 Hits: 2160
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Category: Freeware/Tools
Functional Verification Coverage Measurement and Analysis
Description: by Andrew Piziali
Addresses means of quantitatively assess the progress of functional verification.
Added on: 09-Jun-2004 Hits: 2079
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Category: Reference/Books
Veripool
Description: Free, open-source tools for Verilog and SystemC
Added on: 19-Jul-2004 Hits: 2054
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Category: Freeware/Tools
PSL Quick Reference Guide for VHDL
Description: PSL Quick Reference Guide for VHDL
Added on: 24-Sep-2004 Hits: 2013
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Category: Freeware/Training
Dave Whipp's ASIC Design Verification Pages
Description: Personal pages of Dave Whipp: contains papers and notes on verification issues; plus links to other DV-related pages.
Added on: 06-Jan-2004 Hits: 1949
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Category: Reference/Individuals
VhdlCohen Publishing
Description: PSL and books,
Links to models and
links to other useful sites
Added on: 26-Aug-2004 Hits: 1943
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Category: Business/Business
Introduction to Formal Hardware Verification
Description: Presents an almost complete overview of techniques for hardware verification. Covers all approaches used in existing tools; binary and word-level decision diagrams, symbolic methods for equivalence checking, and temporal logic model checking, and introduces the use of higher-order logic theorem proving for verifying circuit correctness.
Added on: 20-Dec-2003 Hits: 1916
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Category: Reference/Books
Digital Systems Testing & Testable Design
Description: Considered a definitive text in this area, the book includes in-depth discussions of the following topics:
Test generation,
Fault modeling for classic and new technologies,
Simulation,
Fault simulation,
Design for testability,
Built-in self-test Diagnosis
Added on: 14-Dec-2003 Hits: 1884
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Category: Reference/Books
IP/SoC 2004
Description: IP/SOC 2004 (IP Based SoC Design) will be the 13th edition of the Working conference on hot topics in the design world, focusing for the past 4 years on IP based SoC design and hold in the well known Silicon and Alliance Nanometer Valley in the French Alps.
Added on: 31-Mar-2004 Hits: 1830
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Category: Technology/Conferences
Co-Verification of Hardware and Software for ARM SoC Design
Description: The first book written on HW/SW co-verification. The book
provides unique, in depth information about how co-verification really works, how to be successful using it, and the pitfalls to avoid. The book also contains an added bonus: it covers important information about developing and verifying SoC designs using ARM microprocessor cores.
Added on: 27-Aug-2004 Hits: 1794
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Category: Reference/Books
Model Checking
Description: Provides a comprehensive presentation of the theory and practice of model checking. Includes basic as well as state-of-the-art techniques, algorithms, and tools
Added on: 14-Dec-2003 Hits: 1792
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Category: Reference/Books
D&R SoC News Alert
Description: "D&R SoC News Alert" is a free service that delivers to your desktop the latest news in the System-On-Chip world. URLs that point to new product descriptions, industry articles, press releases, are sent to you via e-mail.
Added on: 31-Mar-2004 Hits: 1778
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Category: Business/Newsletters
Teal Open Source Verification Library
Description: Teal is an Open-Source, free library for verification in C++. It has all the basics of verification, stable random number generation, threads, 4-state arbitrary length registers and conection to the DUT. It supports either pli 1.0 or 2.0 and has been compiled with mti,vcs, aldec, and Icarus on Linux, Solarus, and Windows (not all possible combinations).
Added on: 23-Feb-2005 Hits: 1700
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Category: Freeware/Tools
The Art of Verification
Description: How to write testbenches using Vera
Added on: 14-Dec-2003 Hits: 1639
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Category: Reference/Books
Chet Nibby's Functional Verification Page
Description: This page contains a function verification tutorial and other functional verification related material plus my free software.
Added on: 20-Mar-2004 Hits: 1567
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Category: Reference/Individuals
comp.lang.verilog Archive
Description: Archive of the comp.lang.verilog newsgroup
Added on: 14-Dec-2003 Hits: 1552
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Category: Reference/Communities
comp.lang.vhdl Archive
Description: Archive for comp.lang.vhdl newsgroup
Added on: 14-Dec-2003 Hits: 1524
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Category: Reference/Communities
The Digital Electronics Blog
Description: Welcome to the most comprehensive Digital Electronics Blog on the web. SOCs, ASICs, Digital Circuits, Logic Design, Fundamentals, Ideas, Practices, Optimization Techniques, DFT, Interview Questions, Analysis, Code Snippets, Methodologies, Brain Teasers, Paradigm Shifts, Technology Breakthroughs, Gadgets, E-Books, Expert Interviews, Opinions, Tutorials etc. Our Mantra is Smart Design & Development.
Added on: 28-Oct-2007 Hits: 1521
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Category: Reference/Individuals
SystemC: From the Ground Up
Description: By Davic C. Black and Jack Donovan
Step-by-step guide to the syntax, code examples and coding guidelines.
Added on: 09-Jun-2004 Hits: 1497
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Category: Reference/Books
Chris Spear
Description: Chris is a Verification Consultant at Synopsys. His website has interesting material on Vera, Verilog, PLI and verification in general.
Added on: 14-Dec-2003 Hits: 1469
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Category: Reference/Individuals
The Verilog Hardware Description Language
Description: Presents the language through examples illustrating the important styles of representation including: structural models, behavioral models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions.
Added on: 20-Dec-2003 Hits: 1442
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Category: Reference/Books
DFT Digest
Description: DFT Digest is a weblog dedicated to Design-for-Test methodologies and best practices for nanometer IC designs. In it you'll find posts relating to various topics from the very basic to advanced.
Please visit and join the fun!
Added on: 21-Sep-2006 Hits: 1424
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Category: Reference/Individuals
Project Veripage
Description: One-stop source for Verilog PLI resources
Added on: 14-Dec-2003 Hits: 1402
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Category: Reference/Individuals
DV Club
Description: In Q4 2005 over 250 verification engineers attended events in Austin, Dallas, and Silicon Valley. If you are a verification engineer who would like to meet your fellow coworkers, discuss verification trends, speculate on our chosen career, or just like to eat free food, this is for you.
Events are organized quarterly in Austin, Dallas, and Silicon Valley.
Added on: 02-Aug-2006 Hits: 1401
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Category: Reference/Communities
Software Inspection: An Industry Best Practice
Description: This is a handy book with a summary and compendium of papers on inspections. The books traces the industry experience with inspections as mirrored in the technical papers published on the subject.
Added on: 20-Dec-2003 Hits: 1382
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Category: Reference/Books
Asic Guru
Description: Tutorial and Reference material on system verilog, Vera etc.
Added on: 30-Mar-2009 Hits: 1367
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Category: Reference/Individuals
System Verilog 3.1a LRM
Description: System Verilog 3.1a LRM
Added on: 06-Oct-2004 Hits: 1332
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Category: Reference/Reference
Vhdl Coding Styles and Methodologies
Description: Not for the faint of heart. Impress your friends with your VHDL knowledge. Lots of useful techniques for testbenches described in details.
Added on: 20-Dec-2003 Hits: 1325
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Category: Reference/Books
Verilab - Verification Consultants
Description: Verilab has been providing highly-skilled verification consultants all over the world for more than 8 years. All of our engineers are long term employees, we do not use temporary employees or contractors.
Added on: 11-Apr-2008 Hits: 1314
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Category: Business/Services
Systems and Software Verification: Model-Checking Techniques and Tools
Description: Describes in simple terms the theoretical basis of model checking: transition systems as a formal model of systems, temporal logic as formal language for behavioral properties, and model-checking algorithms
Added on: 14-Dec-2003 Hits: 1307
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Category: Reference/Books
Vhdl Answers to Frequently Asked Questions
Description: Goes beyond the language syntax. Look for those thumbs-up, bombs, and big-M's. Excellent chapters on testbenches.
Added on: 20-Dec-2003 Hits: 1299
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Category: Reference/Books
FIFO with Verilog
Description: A FIFO or Queue is a array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. Here is a verilog code and testbench for fifo...
Added on: 14-Jun-2006 Hits: 1299
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Category: Reference/Reference
OpenVera
Description: OpenVera and OpenVera Assertions (OVA) community
Added on: 14-Dec-2003 Hits: 1297
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Category: Reference/Communities
VLSI Design and Test Workshops
Description: VLSI Design and Test Workshops
Added on: 14-Feb-2004 Hits: 1283
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Category: Technology/Conferences
P1647: The e Functional Verification Language Working Group
Description: Working group working toward the IEEE standardization of Verisity's e language
Added on: 20-Dec-2003 Hits: 1275
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Category: Technology/Standards
Open Verification Foundation
Description: OVF was formed to provide, designers, verification engineers and architects assistance in transitioning from Verisity's Specman to open-source verification environments. OVF will provide code and methodologies to show how the best features and capabilities of Specman can be accomplished in an open-source environment while showing from a business level perspective how the benefits of open-source environments can outweigh any implementation adversity. OVF will provide support not otherwise obtainable from vendors due to the open-source nature of the tools. OVF's main focus will be initially on transitioning to SystemC.
Added on: 18-Jan-2004 Hits: 1265
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Category: Reference/Individuals
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