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Category: Main/Reference
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ChipHit.com
Description: ChipHit offers a faster way to get to answers in the ASIC, FPGA, and EDA tool spaces by use of a customized Google search engine, which only searches sites of interest. Currently, ChipHit has well over 1200 digital engineering sites in it (growing every day!), which have been organized into refinements. When you search on ChipHit, all off these sites are searched, and the results are returned. Refinements can be made by clicking the refinement options at the top of the returned results, which will then neck-down the site count to just sites in the refinement category.
Added on: 01-Jun-2007 Hits: 842
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FIFO with Verilog
Description: A FIFO or Queue is a array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. Here is a verilog code and testbench for fifo...
Added on: 14-Jun-2006 Hits: 1300
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System Verilog 3.1a LRM
Description: System Verilog 3.1a LRM
Added on: 06-Oct-2004 Hits: 1333
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SystemVerilog Overview
Description: SystemVerilog is a Hardware design and Verification language having features inherited from Verilog and C++. SystemVerilog is a solution to decrease the gap between design and verification language. Already leading EDA companies like Synopsys, cadence, MentorGraphics have adapted SystemVerilog in their tools.
Added on: 08-Mar-2006 Hits: 1155
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The Verifica Library
Description: We've created a selective collection of papers, references and other information to help you tackle your challenging verification and design tasks. Each library item includes an opinionated review of its more noteworthy insights so you can tap into its value quickly. Check it out.
Added on: 27-Dec-2003 Hits: 2375
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