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Category: Main/Business/Tools
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Design and Verification Tools Plug-In for Eclipse™
Description: The Design and Verification Tools plug-in for Eclipse™ implements an Integrated Development Environment (IDE) for hardware design and verification.
Today, DVT provides support only for e Language development. It adds an e Language project nature and e Language perspective to the Eclipse Workbench, as well as a number of views, editors, wizards, etc.
We plan to add support for other languages: Verilog - in progress, VHDL - in progress, System C, SystemVerilog, as well as integration with the main simulation engines.
Added on: 07-Mar-2006 Hits: 461
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Design and Verification Tools Plugin for Eclipse(TM)
Description: DVT is the most complete development environment for e Language. It makes writting code easier, either you are a junior or a senior, either you just
edit or maintain or architect a verification environment.
Added on: 27-Mar-2008 Hits: 324
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eParser
Description: eParser is the first e language parser on the market. There must be a parser at the core of any application which handles e language constructs. This parser is specifically designed to speed-up the development of e based design automation tools. Users avoid spending time building the e language recognition layer, instead they focus on the added value of their application.
Added on: 06-Nov-2005 Hits: 463
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NameChecker - static e code naming analyser
Description: NameChecker helps you check the project level naming conventions, measure the impact of reserved keywords on legacy code and prevent collisions in future designs.
Added on: 06-Nov-2005 Hits: 411
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Novas Software: SystemVerilog Assertion Backgrounder
Description: Assertions provide a concise mechanism to check for undesired results or undesired behavior and enable users to add "out of the box" observability and testing into the verification environment. The Novas Verdi Debug System provides comprehensive assertion-based debug and analysis capabilities that leverage languages such as SVA to further automate the process of tracing, locating and understanding the root cause of design problems.
Added on: 19-Jul-2007 Hits: 323
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XenoTech Software
Description: The North American distributor of premiere Verification IP products and services. Our portfolio of over 20 UVCs covers Mass Storage; Processor & Interconnect; Automotive; Communications; DFT; and Analog Mixed-Signal in both SystemVerilog and Specman e languages.
Added on: 07-Aug-2007 Hits: 338
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